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CICS/TS architecture part 1 - foundations

This course enables Systems Programmers and Systems Administrators to gain a clear and true grasp of CICS architecture from the ground up. By understanding the Kernel, the Dispatcher, the Transaction Manager and the Application Domains, not only do all of the subsequent components fall into place, but also the fundamentals for Debugging, Performance Tuning and Application Design begin to become a reality. There are two modules in the 'Architecture Series' and it is recommended that they be taken in order. Parts 1 & 2 may be run consecutively or with a consolidation gap between them.

On successful completion of this course attendees will be able to:

  • describe the domain architecture of CICS/TS
  • explain the dispatching of work on multiple TCBs including L8, J8, SO, SL and QR
  • describe how work gets into CICS by a variety of means
  • explain how the Loader and Program Manager domains work
  • debug CICS system and transaction problems
  • discuss IPCS and the CICS verbexit
  • tune CICS/TS
  • describe the CICS-Db2 interface
  • describe the exploitation of Threadsafe programs.

Schedule

dateduréelang.lieuprix 
01 juil5Eweb based 3990 EUR (excl. TVA)
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Intended for

CICS Systems Programmers and CICS Administrators.

Background

Experience of the externals of CICS, such as application and/or systems programming and/or resource definition and administration is preferred. Prior CICS internals knowledge is not required.

Experience of the externals of CICS such as application and/or system programming, and/or resource definition and administration (this prerequisite can be met by attending CICS application programming or CICS Transaction Server systems administration). Prior CICS internals knowledge is not required.

Main topics

  • Domain Architecture

The Domain structure of CICS/TS, how domains are initialised/terminated and how they collaborate with each other.

  • Kernel Domain

Tasentries; KE Stack storage; Domain Gate Table; KE PUSH/POP; Runaway; Kernel Linkage and Kernel Error management.

  • Dispatcher Domain

Default Task; Suspend/Resume; Post Exit mechanism; Dispatchable chains; Hand Post mechanism; ICV; PRTYAGE mechanism; DTAs and DSTCBs; practical session.

  • Transaction Manager Domain

Attach/detach processing; maximum tasks (MXT) and Tranclass processing; control blocks: XM anchor XMTxn.

  • Application Domain

CSA and OPFL; System and User Task Control Areas; the EXEC Interface block; finding the high level language save area for non-LE programs; using the LE dynamic save area and common anchor block for LE conforming programs.

  • Enqueue Domain

ENQMODELS enhancements to CICS for local and system wide locking. How to identify ENQ problems using dumps and on-line techniques. ENQ pools and NQEA control blocks.

  • File Control

Elimination of exclusive control deadlocks and impact on performance incl. CILOCK=NO/YES; changes to local/remote test for function shipping; changes to user exits; use of Coupling facility data tables; RLS and non-RLS files; Record Level Sharing without a CF; practical session.

  • Loader Domain

Programs; Mapsets; Loader Functionality; Program Status; Control blocks: LD anchor, APEs, and CPEs and RPS.

  • Program Manager Domain

Program Logical levels and environment save areas; load list elements; control blocks: PPTEs, PLCBs, PESAs. COMMAREA limit circumvention via Channels & Containers, example of use, channel scope and internal blocks.

  • Language Environment

Using CEECOPT, CEEROPT and the CLER transaction to manage storage and debugging options; using LE process, enclave and thread blocks to debug applications; using the LE traceback report; understanding SIT parameters AUTODST and RUWAPOOL.

  • Debugging Transaction Dumps

ASRAs; AICAs; Dynamic call and Program LINKs; Practical.

  • CICS/Db2 Interface

Using the Db2 control blocks to find SQL statements and solve problems; control blocks: D2GLB, D2CSB, D2LOT, D2ENT and D2TRN.

Training method

The course includes presentations and transaction & system dumps.

Duration

5 days.

Course leader

RSM Technology.


INFO SESSION ET INSCRIPTION