z/OS system anatomy part 1 - z Architecture
This and the associated z/OS system anatomy part 2 - z/OS infrastructure & services form the core course of the MVS systems curriculum. By attending both components, students obtain a solid foundation, enabling further study in areas such as debugging, performance, installation, and customization of MVS. In the first part, students learn the 'ground rules' of MVS, in terms of architecture, storage management, and the major MVS control blocks and how to interpret them. The major MVS components are also introduced and a high level overview of job flow processing is briefly discussed. Part I finishes by showing how an MVS system is generated and IPL'd to produce a running system.
Schedule
| BEDRIJFSOPLEIDING AANVRAGEN |
| Publieke opleidingskalender | |||||
|---|---|---|---|---|---|
| datum | duur | taal | plaats | prijs | |
| 07 apr | 4 | E | web based | 3019 EUR (excl. BTW) | |
| 01 sep | 4 | E | web based | 3019 EUR (excl. BTW) | |
| SESSIE-INFO EN INSCHRIJVEN | |||||
Intended for
This course is designed for individuals who wish to gain a fundamental understanding of MVS in order to pursue more advanced study or to better communicate with others in the MVS community. Candidates include new system programmers; system programmers currently working with subsystems such as CICS, IMS or VTAM; application programmers; system analysts; and senior operations personnel.
Background
To benefit from this course, participants should be able to work with binary and hexadecimal numbering systems, find a given location in a dump, define a job, a step, and a data definition and list the JCL statements that represent each, understand the structure of a program, including the concept of base and displacement. Courses that will help meeting these prerequisites include: ISPF/PDF basics, MVS and z/OS overview, and JCL.
Main topics
- Description of the architectural principles governing the use of the CPU, Central Storage and the Channel SubSystem in the ESA/390 environment;
- Identification of the state of a CPU by examining PSW;
- Listing of the functions of the MVS components required to prepare MVS for work • execution of the work • exit of the work from the system;
- Use of IPCS and the debugging handbooks to locate and interpret major MVS control blocks in a dump;
- Description of the implementation of virtual storage in MVS;
- Map of the MVS address space;
- Dataspaces and Hiperspaces: creation and use;
- 'Sysgen' and IPL processes;
- Concept of authorised programs • subsystem interface • Master Scheduler.
Training method
Lecturing and exercises.
Duration
4 days.
Course leader
RSM Technology.
| SESSIE-INFO EN INSCHRIJVEN |