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z/OS system anatomy part 1 - z Architecture

This four-day course and the follow-on Part 2 course together form the essential core of RSM's z/OS education curriculum for z/OS Systems Programmers.

By attending both this and the follow-up course, attendees will gain an in-depth insight into the fundamental structure of z/OS, enabling further skills enhancement in areas such as debugging, performance, installation and customisation of the operating system.
This course concentrates on laying the ground rules of z/OS in terms of architecture and storage management, as well as explaining the major control blocks and how to interpret them. The course also introduces the major components found in today's Z Systems environments.

On successful completion of this course you will be able to:

  • describe the architectural principles governing CPU, Storage and I/O
  • identify the state of a CPU and describe potential problem scenarios
  • use IPCS and the debugging guides
  • describe the principles of Virtual Storage
  • describe the purpose of AMODE and RMODE
  • describe a page fault and its consequences
  • set up a flexible paging/swapping subsystem
  • explain how dataspaces and hiperspaces work
  • describe how an IPL works
  • isolate problems during an IPL
  • explain the concept of authorised programs

Schedule a training?

Delivered as a live, interactive online training.

BEDRIJFSOPLEIDING AANVRAGEN

 

Publieke opleidingskalender

Momenteel zijn er voor deze cursus geen publieke sessies gepland. Graag organiseren we een bedrijfssessie voor u of een extra publieke sessie (bij voldoende belangstelling). Geïnteresseerd? Laat het ons weten.

Intended for

This course is designed for those who wish to gain an in-depth understanding of z/OS systems in order to improve their proficiency in the z/OS environment.

Background

A good working understanding of the z/OS environment, from a technician's perspective.

You can test yourself to see if you have enough background by filling out the online selftest "ISPF" and the online selftest "JCL".

Main topics

  • Architecture
    • Component overview
    • Executing instructions
    • The Program Status Word (PSW);The control bits of the PSW
    • z/Architecture PSW
    • Pipelining
    • CPU components
    • Timing facilities
    • Registers in a z/Architecture machine
    • 64-bit registers and instructions
    • Using the registers
    • Updating the PSW
    • Instruction Length Code (ILC)
    • Multiprogramming
    • The Load PSW (LPSWE) instruction
    • Interrupts
    • Interrupt types
    • SVC interrupt
    • I/O interrupt
    • External interrupt
    • Program interrupt
    • Machine check interrupt
    • Error handling philosophy
    • Restart interrupt
    • Interrupt action
    • The current PSW is saved
    • Interrupt considerations
    • System states
    • System state and the PSW
    • How the system runs
    • Real Storage
    • Addressing mode
    • Tri-modal addressing mode
    • Memory boundaries
    • Storage keys
    • Key operation
    • The PSW key fields
    • Fetch Protect
    • Multiprocessing
    • Prefixing
    • Address types
    • I/O components
    • Serial channels
    • Multiple paths
    • Real configurations
    • Hardware Configuration Definition (HCD)
    • Dynamic Reconfiguration Management (DRM)
    • Subchannels
    • Unit Address
    • Device Number
    • Subchannel Numbers
    • Logical Control Units (LCUs)
    • Channel Command Words (CCWs)
    • Starting an I/O operation
    • When an I/O interrupt occurs
    • Obtaining I/O status
    • The Subchannel Status Word (SCSW)
    • An architectural summary
    • Review questions
    • Exercises
  • Job Flow in z/OS
    • Once upon a time
    • System 360 architecture: Real storage, CPU, I/O
    • S/370 architecture: Main storage, CPU, I/O, DAS
    • S/370 XA: Main storage + Expanded Storage, CPU, I/O
    • ESA/370 and ESA/390
    • z/Architecture
    • Operating systems: S/360 operating systems, S/370 operating systems, S/370/XA operating systems, ESA operating systems, z/OS
    • A sample JOB
    • The role of MVS
    • MVS components
    • Job flow overview
    • Initialization
    • Creating a user address space
    • The Job Entry Subsystem
    • The initiator
    • Resource control
    • Program Manager
    • SFWJOB executed
    • Interrupts
    • Interrupt handlers and status saving
    • The dispatcher
    • Requesting I/O
    • Synchronizing I/O requests: WAIT, POST
    • The Recovery Termination Manager
    • The initiator/terminator
    • The Workload Manager
    • Job flow review
  • Control Blocks, Dumps & IPCS
    • Introduction
    • Control block/data area
    • Information sources: Diagnostic manuals, IPCS manuals, MVS Data Areas Manuals
    • Control block header
    • Control block data area map: Data types, Bit flags
    • Cross reference table
    • Fields and subfields
    • Field redefinitions
    • Control block chaining
    • Finding control blocks - PSA and CVT
    • The Prefix Area (PSA)
    • z/OS Prefix Area (PSA)
    • Finding control blocks - UCB: UCB prefix stub (UCBPREFIX), UCB common segment (UCBOB), UCB device dependent segments (UCBMXT &UCBXPX)
    • Dump types
    • Different dumps and where to put them
    • Dump formats
    • What is IPCS?
    • What comprises IPCS?
    • DDIR contents
    • Getting started with IPCS
    • Default values selection
    • Primary Option Menu
    • Data entry panel
    • Pointer stack panel: Line commands, Pointer types
    • Sample storage panel
    • Getting around in IPCS BROWSE: Scrolling and IPCS's PFKeys, 'Stack and Go'
    • FIND primary command
    • LOCATE primary command
    • Data Descriptor - types of addresses: LITERAL ADDRESS, X, RELATIVE ADDRESS, SYMBOLIC ADDRESS
    • Using IPCS subcommands - IPCS
    • IPCS subcommands
    • Using IPCS subcommands: CBFORMAT, WHERE
    • Another WHERE example
    • Review questions
    • Exercise
  • Virtual Storage Concepts
    • Introduction
    • What is a program?
    • Source code
    • Turning it into executable code
    • The compiler, The Binder, Relative Addresses
    • Real storage
    • Loading a program into real storage: Relocation, Base displacement addressing
    • Rules for loading programs
    • The problems with real storage: Fragmentation, Low MPLs
    • A solution? - Address translation tables
    • Find the code when you want it
    • Dynamic Address Translation
    • How DAT works?
    • Segments and pages
    • Segmentation
    • So how does DAT really work?
    • The 64-bit Virtual Address
    • Virtual address translation and DAT
    • The Translation Lookaside Buffer: Block numbers, The TLB
    • Goodbye fragmentation
    • Hello inactive code: Initialization code, Main functional code, Exceptional condition handling code, Termination code
    • Page stealing and the UIC: The UIC update process, UIC in z/Architecture
    • Auxiliary storage
    • Loading the program: Page stealing, Page out
    • Page faults
    • The External Page Table
    • Demand paging
    • Goodbye inactive code
    • MULTIprogramming
    • Virtual Storage capacity
    • Multiple Virtual Storages
    • What is an address space?
    • 64 bit addressing - region tables
    • Common storage
    • Dispatching an address space
    • Reloading the PSTO
    • Fixing, thrashing, etc
    • Swapping
    • The dangers of inactivity.
  • z/OS Storage Management
    • Introducing, ... the lines
    • AMODE and RMODE
    • The z/OS address space - common storage
    • The Nucleus
    • The Link Pack Areas
    • The System Queue Area
    • The Common Service Area
    • Extended areas
    • The PSA
    • The Common Area boundaries
    • The z/OS address space - private storage
    • The LSQA/ELSQA
    • The SWA
    • The AUK
    • The USER region
    • Multiple address spaces
    • Identifying the address space boundaries
    • The GDA
    • The CVTSMEXT
    • Virtual Storage is not real!
    • VSM
    • RSM
    • ASM
    • VSM, the Virtual Storage Manager
    • SUBPOOLS
    • STORAGE KEY values
    • Requesting Virtual Storage
    • VSM validates..
    • Cellpools
    • How much space can I have?
    • REGION=6M
    • REGION=48M
    • REGION=0M (or 0K)
    • A larger address space in z/OS290
    • 64 Bit Storage Map - memory sharing
    • Displaying HVSHARE & HVCOMMON
    • Characteristics of memory objects
    • Guard area
    • Using memory objects
    • The IARV64 'unshared' service
    • The IARV64 'shared' services and 'common' services
    • Large page support
    • LFAREA
    • How to foil (virtual) land barons!
    • JES defaults
    • The JCL REGION=
    • SMFPRMxx MEMLIMIT
    • The IEALIMIT exit
    • The IEFUSI exit
    • RSM, the Real Storage Manager
    • Allocating frames
    • Processing page faults
    • Table maintenance
    • Instructs
    • Page fault resolution: Synchronous, Asynchronous
    • Segments faults
    • Allocating Real Storage frames
    • Fetch protected?
    • Other characteristics
    • RSM's own address space
    • The RASP A/S
    • ASM, the Auxiliary Storage Manager
    • RSM's access method
    • Page Data Sets
    • The PLPA Page Data Set
    • The Common Page Data Set
    • Local Page Data Sets
    • VIO
    • Will the data always be in storage?
    • The address space: VSM, RSM, ASM
    • Review questions, Exercise - Lab.
  • Dataspaces and Hiperspaces
    • Objectives
    • I/O delay - what does it really cost?
    • Holding the data in the address space
    • Dual Address Space
    • Primary and secondary ASC mode
    • Dataspaces
    • Access Registers
    • Access Register ASC mode (AR mode)
    • Using a dataspace
    • VLF, the Virtual Lookaside Facility
    • Hiperspaces
    • Creating hiperspaces
    • Review questions
  • System Initialisation
    • Overview
    • A working system
    • Installation and initialization overview
    • Software delivery
    • I/O definition
    • Define the devices
    • Define esoteric group names
    • Define the NIP Console
    • HCD - 'active configuration'
    • LOADxx and the IPL process
    • Load Unit Address
    • The Load Parameter
    • The LOADxx member
    • IPL overview
    • The hardware IPL function
    • The IPL program
    • Load the nucleus
    • Load the UCBs
    • Map the Nucleus
    • Load NIP
    • NIP overview
    • Specifying system parameters
    • No overriding?
    • System address spaces
    • Building the PLPA
    • Building the FLPA and MLPA
    • Building the link list
    • LLA
    • Trustworthy code
    • Modeset
    • The Authorized Program Facility
    • Authorized libraries
    • Initialize any other processors
    • MSI overview
    • The SubSystem Interface
    • A communications protocol
    • IEFSSNxx
    • The Master Subsystem
    • How the SubSystem Interface works
    • Load the Master Scheduler
    • Starting JES
    • Processing the command
    • Starting other work
    • Review questions

Training method

Live instructor-led training, with plenty of opportunities for hands-on exercises and discussion.
This course is also available for exclusive one-company presentations, live over the Internet, via the Virtual Classroom Environment service.

Certificate

At the end of the session, the participant receives a 'Certificate of Completion'.

Duration

4 days.

Course leader

RSM Technology.


SESSIE-INFO EN INSCHRIJVEN